Control system stability is very dependent upon and is affected by delays in the control loop due to analog-to-digital signal conversion and information transfer delay times. For example, in a pulse width modulation (PWM) controlled system the control loop stability is highly dependent upon the delays from the moment the analog data value is sampled until an updated PWM output can be applied to the controlled circuit. Typical techniques to reduce control loop delays are to use faster digital processors and faster analog-to-digital converters (ADCs) to reduce the time needed to acquire feed back information and then compute the next control output state. Faster digital processors and ADCs are more expensive and consume more power than the more common low power processors and ADCs. Excessive loop delays can introduce overshoot and instability in the control loop performance, and is not desirable in high performance electronic control devices and systems.